The CEO of SK Hynix said on Sunday the importance of memory will become more important in the era of digital transformation.
Company CEO Lee Seok-hee, speaking at the 2021 IEEE International Reliability Physics Symposium (IRPS), said the company will overcome various material, structure and reliability challenges to develop under 10-nanometer (nm) DRAM and 600-layer NAND in the next ten years.
Under 10nm DRAM will require semiconductor companies such as SK Hynix to overcome lithography challenges, maintain cell capacity and low resistance wiring, Lee said.
The South Korean memory maker was applying extreme ultraviolet (EUV) process to manage material and defects as well as the development of photoresist, Lee said. It was also working to expand cell capacity through structural innovation and new materials.
The CEO also said the automotive semiconductors, resolving soft errors was the priority. This requires improvements in design but will also cause costs to rise. SK Hynix was developing a way to improve design while reducing cost burdne.
For NAND flash, securing high aspect ratio contact (HARC) etching, cell volatility characteristics and resolution for film stress was required, Lee said.
Oxide nitride scaling technology was also an important step to securing reliability in NAND flash, the CEO said. SK Hynix has developed deep trap CTN and isolate-CTN structures to over come this.
SK Hynix was also developing compute express link memory for ultra low-power, Lee said. Memory and logic will converge in the future, the CEO said.
The company is preparing to mass produce 1nm Gen 4 (1a) DRAM. It has recently developed 176-layer 3D NAND.
