Samsung will begin applying modified semi additive process (MSAP) package technology in DRAM production starting with double data rate 6 (DDR6) and onward, a company executive said.
Samsung test & system package (TSP) vice president Younggwan Ko said during a seminar in Suwon, South Korea, that packaging technology must evolve as the performance of memory semiconductors gets higher.
A competitor of Samsung’s has already applied MSAP starting with DDR5 and Samsung will also so do so starting with DDR6 instead of using tenting, Ko noted.
The previous tenting method only coated areas of the circular copper plate where the circuit patterns will be formed while the other areas were etched out.
But in MSAP, the areas besides the circuits are coated and the empty spaces plated, allowing for finer circuits.
As the capacity and data processing speed of memory chips increase, packages must be designed to fit that, the VP said.
As the number of layers increases and processes become more sophisticated, the memory package market is also expected to grow exponentially, Ko said.
In terms of fan-out, another packaging technology where the I/O terminals are placed outside the chip to allow chips to become smaller while retaining the ball layout, Samsung was applying both fan out-wafer level packages (FO-WLP) and fan out-panel level packages (FO-PLP).
FO-PLP was advantageous in wafers in the 12-inch range and Samsung was thinking of using it for larger chips.
A vendor’s sophistication in FO-PLP can be determined when it can apply it to mobile application processors, which have complex designs, the VP said.
The South Korean tech giant has applied the packaging technology on the application processor for Google’s Pixel Phone since May, which means its technology in FO-PLP was mature, Ko stressed.
