Samsung is planning to adopt a new board that will allow for narrower circuit width to apply its new fan-out packaging technology for semiconductor boards.
The company can use the semi-additive process to reach a circuit width of 2/2 micrometers, Samsung manager Lee Choong-sun said at the 2023 Advanced Semiconductor Package Innovation Process Conference hosted by TheElec at COEX, Seoul.
But for high bandwidth memory technology to advance, the width must become narrower than 1/1 micrometers and this can’t be done with SAP, Lee explained.
This is why Samsung is planning to adopt the Damascene method, he said.
SAP coats the non-circuit areas of the board. The coating is removed after the circuit is plated. In Damascene, groves are formed on the board where the circuit will be and electroplating is used to form the circuits.
This will allow Samsung to make chip boards that are denser, Lee said.
The tech giant formed a team it calls AVP, which handles advanced chip packaging, from the rising importance of the sector.
Samsung is focusing on fan-out, 3D packaging for smaller chips and 2.5D, 3.5D for large chips.
Fan-out packaging puts the I/O terminal wires outside of the chip which reduces the distance between the chip and the main board that increases its performance.
FO is being adopted more and more for advanced chips such as HBM and other new memory chips.
